Machines

Apparatus And Method For Reorder Buffer With Sliding Window In A Treats the Relationship as the Point

A new SambaNova patent makes an old dataflow problem visible: in the race to sell inference, packets still have to wait their turn.

Clay-diorama editorial illustration related to Apparatus And Method For Reorder Buffer With Sliding Window In A Reconfigurable Data Processor.

What changes in this design

You might assume data arrives in the order it was sent. Inside a chip with many senders sharing one network, that assumption breaks down. Packets take different paths, run into different amounts of traffic, and a piece sent second can easily land before the piece sent first.

Rather than fight over who transmits when, each sending block attaches a number to every packet marking its place in the sequence. The receiving block uses those numbers, not the moment of arrival, to decide what to read next. Whatever shows up early simply waits its turn.

Order matters when the work is a calculation. Numbers read in the wrong sequence give a wrong answer. Separating the order of use from the order of arrival means the senders and the network need not stay in lockstep, and the receiver still gets a correct, predictable stream.

July 8, 2026

On July 8, I noticed the number before I noticed the machinery: an $11 billion post-money valuation for SambaNova, tied to a $1 billion first close. That jump followed reported $1.6 billion acquisition talks with Intel that collapsed late in 2025, and a Series E of more than $350 million announced in February 2026. It is a sharp sequence of numbers for a company selling reconfigurable processors and rack-scale systems for inference.

The search for what such a valuation was buying led me to a filing made nine days after the February round was announced. It is not a grand announcement about software or a customer win. It concerns the stubborn work of making packets arrive in the right order inside a machine.

Tagged tokens

Long before I saw this filing, I had learned to treat dataflow hardware with a little caution. In the 1970s, the MIT Tagged-Token machine and the Manchester Dataflow Machine set out a different bargain: an instruction could fire once its tagged inputs had arrived. Arrival order and matching were not housekeeping. They were the problem.

The old projects exposed, for me, limits in token broadcast, instruction dispatch, and the size of a content-addressable memory needed for real programs. Maurice Wilkes later called dataflow the most radical and least successful approach to parallelism. That history isn't, to me, a verdict on every newer chip. The history is, to me, a warning that the traffic system matters as much as the arithmetic.

Packets out of order

That is why I think US20260254768A1 deserves attention. SambaNova filed it on February 26, 2026, and it published on August 27. Several source units can send packets over an interconnect to one destination. The destination must consume them in sequence-identifier order even when the network delivers them in another order.

The proposed cure is, in my reading, a carefully bounded reorder buffer, not a claim that disorder disappears. A sliding window maps packet sequence identifiers into buffer slots using modulo arithmetic; base-offset counters track the usable range, while credits are kept for individual sources. The filing also faces two awkward facts: a dedicated reorder buffer at every destination costs area and power, while forcing packets down one deterministic route can squander bandwidth and create congestion. Sequence-identifier wraparound and credit-flow buffer aliasing are part of the bill.

A shared physical port

This filing doesn't look to me like SambaNova's first encounter with jammed traffic. A 2023 application described head-of-line blocking when several links shared one physical port: a link could win arbitration, lack credits, and stop the links behind it. Its proposed response used per-link credit-hog counters and programmable priority arbitration. The pattern looks to me like a thread, not an isolated invention: the company has been working on how dataflow traffic fails under pressure.

Turning that thread into a performance result is something we should resist. A skeptical 2025 account reports that SambaNova cut 15 percent of its staff as it shifted away from training toward inference services, and notes that it has not disclosed MLPerf results. Those are meaningful cautions. A patent tells me where engineers expect friction; it does not tell me how the chip compares in an independently reported benchmark.

What the filing is really betting on

A similar sliding-window pattern was what I found outside chips. A 2017 wireless reordering filing used sequence-number slots and header and tail pointers, with an option to release a data unit early if a higher layer could restore order. The reason I mention it is that it keeps the claim modest: this is a durable systems pattern, not proof that one architecture has solved it for good.

This filing is, in my reading, betting on a particular balance. If its window can restore order without placing expensive full reorder hardware everywhere or strangling the network with a single prescribed path, a reconfigurable processor can keep the flexibility that drew people to dataflow in the first place. The August publication is not something I'd treat as evidence that the bet has paid off. The August publication is something I'd treat as clear evidence that, while SambaNova raises new money for inference, the old ordering problem is still active inside the hardware.

Sources

Reporting for this piece drew on the published filing and the references below.

The record, briefly. US20260254768A1, “Apparatus And Method For Reorder Buffer With Sliding Window In A Reconfigurable Data Processor” The abstract describes ordered delivery of packets from multiple source units to a destination unit in a reconfigurable data processor whose configurable units are coupled by an interconnect network. Source units transmit packets carrying sequence identifiers, and the destination unit consumes them in the order set by those identifiers regardless of arrival order.

Identity details. The saved title-page transcription needs review, so names are not repeated here. Check the official published title page.

More angles on this

CPC H04L: Transmission of digital information, e.g. telegraphic communicationThe official classification family this record was filed into, published in the USPTO Cooperative Patent Classification scheme.
A Reading Taken in the Ear, and the File It Has to ReachAnother reading from the neighbouring H04R classification family, loudspeakers, microphones, gramophone pick-ups or like acoustic electromechanical transducers.
Keeping Time Across a StackAnother reading from the wider H10B classification family, electronic memory devices.
When Context Changes Hands in Healthcare InformationAnother reading in the same Machines category on this site.

Read around this one:Public patent record USPTO published figure