Field Notes

Non-Volatile Memory With Distributed Write: the erase step that sets the price

SanDisk's new memory filing revives an old way to make flash last longer, just as durable storage is newly valuable.

Clay-diorama editorial illustration related to Non-Volatile Memory With Distributed Write.

What changes in this design

The record does not say what conventional memory ordinarily does. A reader might otherwise picture a write followed by an erase before later writes, because this method permits multiple programming operations without an intervening erase.

It distributes N data bits across M memory cells, with M greater than N, and uses an encoding scheme that allows multiple programming operations without an erase process between them.

The goal is greater endurance for non-volatile semiconductor memory. Several programming operations can occur before an erase process intervenes. The record does not say how much endurance changes.

The cycle count

A QLC flash cell may be rated for roughly 100 to 1,000 program/erase cycles, while SLC can reach about 100,000. The gap is the price of storing more bits in each cell. MLC is often placed around 3,000 to 10,000 cycles and TLC around 1,000 to 3,000, so the engineering problem is not mysterious: density is cheap only until the writing wears the medium down. A phone, a laptop, and a rack of enterprise drives all make that trade differently, but none gets to ignore it.

That is the point at which I stop treating a patent title as a promise. US20260253641A1, published in August 2026 as Non-Volatile Memory With Distributed Write, is about a constrained piece of arithmetic: put N data bits across M memory cells, where M is larger than N, and use an encoding that permits multiple programming operations before an erase. The design deliberately uses more physical cells than the raw data requires, so writes can be distributed rather than concentrated. It is a sensible old bargain, not a new law of physics.

The spare cells

Flash does not simply revise a cell as a word processor revises a sentence. Programming and erasing are physical operations with a finite endurance budget. The proposed scheme increases the number of physical patterns available for a data value. Its stated benefit is the chance to keep programming data while spreading the work among more cells, without immediately erasing them.

The surplus cells are not free: using more cells for the same payload means a capacity cost. The available description does not establish the performance, controller complexity, or workload conditions that would make that cost worthwhile. I can't tell from it whether the claims are genuinely distinct or a narrower variation on a familiar method. A published application is evidence of a bet, not evidence that the bet will become an issued patent.

2003, then 2007

That familiar method has a date attached to it. In February 2003, Steven T. Sprouse filed at Sun Microsystems an invention titled Extending non-volatile memory endurance using data encoding. Its published application describes encoding data into a larger set of non-volatile-memory bit patterns so that changes cause fewer changes per physical memory bit. The language is close enough to make the 2026 filing feel less like a sudden discovery than a return to a durable engineering question.

On Sept. 24, 2007, Sprouse and three co-inventors filed a SanDisk invention later issued as US7697325B2. It described a predetermined n+k-bit encoding that reduces the number of cells programmed for an n-bit data block. That is a direct family resemblance: N data bits expanded across added physical capacity so the write burden can be managed. The thing I find most telling is not that the earlier documents exist. It is that the same basic trade keeps becoming worth staking in public.

The SanDisk ledger

SanDisk's timing gives that recurrence weight. Its 2025 separation filing listed about 7,900 granted patents and 2,800 pending applications worldwide, alongside $567 million in research and development spending for the six months ended Dec. 27, 2024. In its fiscal 2026 third quarter, the company reported $5.95 billion in revenue, up 251 percent year over year; datacenter revenue rose 645 percent, with management pointing to AI-driven demand for higher-value enterprise products. A market report estimates global NAND flash at $58.69 billion in 2026 and projects $76.03 billion by 2031, with enterprise SSDs its fastest-growing segment and 3D NAND layers exceeding 300. This is where I think the filing belongs: inside a business whose recent results management ties to AI-driven demand for higher-value enterprise storage.

The January license

The rights themselves are still being negotiated. In January 2026, an affiliate of IPValue granted SanDisk a worldwide nonexclusive license to a NAND-flash portfolio, and the parties said the agreement resolved their outstanding disputes. Independent coverage described that portfolio as reaching 2D and 3D NAND, including MLC, TLC, QLC, SONOS, and charge-trap designs. The settlement does not prove anything about this application's strength. It does show that implementation details and ownership remain commercially consequential. I would resist treating a fresh publication as proof of an imminent product, but I would not dismiss it as paperwork either.

What would have to be true

The strongest case for distributed writing is not that flash is failing everywhere. It is that avoided rewrites can matter sharply when capacity is packed densely and devices are written constantly. A November 2025 paper on high-capacity SSDs pursued a different route: dynamically adjusting the data randomizer as cells age, rather than relying on fixed encoding. The endurance problem is plainly still worth research, but SanDisk does not own the question.

At the same time, a technology publication argues that QLC's bad reputation has outrun ordinary use, citing rated consumer drives and growing enterprise deployment. That seems right to me as a warning against panic. For my money, this filing is most interesting as a record of persistence: an old encoding idea keeps returning because the cost of a write remains negotiable, even if most buyers will never notice the negotiation. What we would need to see next is data showing that this particular encoding improves endurance, performance, or usable capacity under a defined workload, rather than merely restating a venerable premise.

Sources

Reporting for this piece drew on the published filing and the references below.

The record, briefly. US20260253641A1, “Non-Volatile Memory With Distributed Write” The publication proposes increasing non-volatile semiconductor-memory endurance by programming N data bits across M cells, where M is greater than N, using an encoding scheme that permits multiple programming operations without an intervening erase process.

More angles on this

A storage medium with two bosses, and the address that has to survive the handoffAnother reading from the same G11C classification family, static stores.
Memory Circuitry And Method Used In Forming Memory Circuitry Questions the Default ArrangementAnother reading from the same G11C classification family, static stores.
CPC G11C: Static storesThe official classification family this record was filed into, published in the USPTO Cooperative Patent Classification scheme.
The Useful Quiet Room Beside MemoryAnother reading of a record filed by the same applicant, Sandisk Technologies.
The Light Loop Inside an Oral-Care RoutineAnother reading from the wider G06T classification family, image data processing or generation, in general.

Read around this one:Public patent record USPTO published figure